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    AD Spain

    Semiconductors

    Staff Layout & Design Automation Engineer

    Spain, Valencia, Cortes Valencianas, SpainOn-SiteFull-time8+ yrs experiencePosted 3w ago
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    Job description

    About Analog Devices

    Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.

    Analog Devices "Platform IP" organization is seeking an experienced Senior Layout & Design Automation Engineer to join our growing team. This role combines deep expertise in analog and mixed-signal IC layout with a passion for engineering productivity, automation, and IP reuse.

    The successful candidate will be responsible for delivering complex block and subsystem layouts while also driving continuous improvement of layout methodologies, automation frameworks, and reusable IP infrastructure. The engineer will collaborate closely with circuit designers, layout engineers, EE teams, and technology experts to enable high-quality silicon solutions across multiple business units and process technologies.

    This position is ideally suited to an engineer who is equally comfortable solving challenging physical design problems and developing automation solutions that improve engineering efficiency at scale.

    Key Responsibilities

    Technical Layout Leadership

    • Lead development of complex analog and mixed-signal layouts from floorplanning through tapeout.
    • Own layout execution for critical IP, subsystems, and test-chip developments.
    • Drive high-quality layout implementation for:
      • Data converters (ADCs/DACs)
      • Power management circuits (LDOs, references, regulators)
      • Amplifiers and signal chain circuits
      • PLLs and clock-generation circuits
      • High-voltage and mixed-voltage designs
    • Ensure designs meet performance, matching, reliability, ESD, latch-up, and manufacturability requirements.
    • Drive successful DRC, LVS, ERC, EMIR and parasitic extraction closure.

    Design Automation & Productivity

    • Develop and deploy automation solutions that improve layout productivity and design quality.
    • Identify repetitive engineering tasks and implement scalable solutions.
    • Support advanced methodologies including:
      • Automated layout generation
      • Layout verification automation
      • IP qualification workflows
      • Reusable analog building blocks
      • AI-assisted design and productivity initiatives
    • Partner with CAD and EDA teams to improve design flows and tool integration.

    IP Development & Reuse

    • Contribute to the development of reusable Platform IP across multiple technology nodes.
    • Support IP migration, qualification, and reuse activities.
    • Promote best practices for containerized IP, version control, and design traceability.
    • Assist in defining scalable methodologies that enable reuse across business units and geographical teams.

    Technical Leadership & Mentorship

    • Provide technical guidance to layout engineers across the organization.
    • Perform layout reviews and design audits.
    • Mentor junior and mid-level layout engineers.
    • Contribute to engineering standards, training material, and best-practice documentation.
    • Act as a recognized subject matter expert in one or more technical domains.

    Required Qualifications

    • BS, MS, or equivalent experience in Electrical Engineering, Electronics Engineering, or related discipline.
    • 8+ years of analog or mixed-signal IC layout experience.
    • Proven experience delivering silicon in advanced and mature process technologies.
    • Expert knowledge of:
      • Cadence Virtuoso
      • Layout XL / VXL methodologies
      • Calibre DRC, LVS, ERC and extraction flows
    • Deep understanding of:
      • Device matching
      • Parasitic effects
      • Shielding and isolation techniques
      • Reliability and ESD considerations
      • Power distribution and substrate management
    • Scripting and automation experience using one or more of:
      • SKILL
      • Python
      • Shell/Bash
      • Tcl

    Preferred Qualifications

    • Experience developing engineering automation deployed to multiple users.
    • Experience with analog layout generators and parameterized cell development.
    • Familiarity with AI-assisted engineering workflows.
    • Experience supporting IP libraries shared across multiple design groups.
    • Knowledge of multiple foundries and process nodes.
    • Experience working with distributed global engineering teams.
    • Previous technical leadership or project-lead responsibility.

    Success Profile

    A successful candidate will:

    • Consistently deliver high-quality layouts on complex projects.
    • Improve engineering productivity through automation and workflow enhancement.
    • Influence layout methodology across projects and teams.
    • Champion IP reuse and standardization.
    • Mentor engineers and raise the technical capability of the organization.
    • Act as a recognized technical leader while remaining hands-on with design execution.

    #LI-CC1

    For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export  licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.  As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

    Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

    Job Req Type: Experienced
    Required Travel: Yes, 10% of the time
    Shift Type: 1st Shift/Days

    Job details are sourced from the employer's original posting.

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    About the company

    AD Spain

    A company operating in Spain, likely involved in some form of business or service.

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    Semiconductors
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