Principal Accountabilities * Work with teams on floor-planning, timing constraints, physical synthesis, formal verification, clock tree optimization, routing, extraction, timing closure, DFT, signal integrity, physical verification and DFM. * Collaborate on executing the block level place and route assignments from Netlist through GDS flow. * Interact with design team with purpose to solve problems and propose physical design engineering ideas. * Coordinate all timing budgeting required for physical design task with respective teams. * Close STA timing across all corners and modes for blocks and should be able to generate ECO independently.
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eInfochips is a product engineering and software R&D services company with over 20+ years of experience, 500+ product developments, and 40M+ deployments in over 130 countries. Today, 60% of our revenues come from Fortune 500 companies and 80% from solutions around connected devices. Founded in 1994, our work culture is built over years of experience in providing innovative solutions to our clients and our indomitable spirit to excel in all aspects of our engagement, we call it - “Passioneering” We believe that our success lies upon the skills and quality of our people we work with. Today, we are geographically spread with 1800+ employees, 10 design centers and offices in India, Japan and the USA.