Incumbent will be responsible for Scan insertion and validation, BIST, MBIST insertion and validation, ATPG, IP Tests and Pattern validation w/wo Timing, DFT mode timing Analysis and sign off.
Be responsible for a comprehensive DFT plan
Incumbent to work with DFT and cross functional teams
To architect and implement solutions for Scan and built-in self-test (Memory and Logic BIST) circuitry to test devices in the field
ESSENTIAL SKILLS & EXPERIENCE
Strong fundamentals on DFT and ASIC cycle.
Sound expertise in Tcl, Perl, Shell scripting. Technically sound & good team player
Hands-on experience with DFT implementation using standard EDA and flow is a must.
Experience on latest technology (28nm,16nm,7 nm)
Job details are sourced from the employer's original posting.
Open job postingAbout the company
eInfochips is a product engineering and software R&D services company with over 20+ years of experience, 500+ product developments, and 40M+ deployments in over 130 countries. Today, 60% of our revenues come from Fortune 500 companies and 80% from solutions around connected devices. Founded in 1994, our work culture is built over years of experience in providing innovative solutions to our clients and our indomitable spirit to excel in all aspects of our engagement, we call it - “Passioneering” We believe that our success lies upon the skills and quality of our people we work with. Today, we are geographically spread with 1800+ employees, 10 design centers and offices in India, Japan and the USA.