Minimum qualifications:
- Master’s degree in Electrical Engineering, Materials Science, Chemical Engineering, Physics, a related field, or equivalent practical experience.
- 7 years of experience with semiconductor process integration or yield engineering (i.e., end-to-end module interactions, systematic yield improvement, defectivity analysis/reduction, parametric centering, wafer-level test/analysis, fab-wide Statistical Process Control (SPC), line disposition protocols, etc.).
- 4 years of experience with people management leading cross-functional engineering teams through semiconductor product transitions (i.e. early manufacturing flows to high volume manufacturing).
- Experience with advanced materials sets, devices and integration schemes (i.e., GaN on Si electronics, compound semiconductor optoelectronics, advanced CMOS integration, etc.).
Preferred qualifications:
- PhD in Electrical Engineering, Materials Science, Chemical Engineering, Applied Physics, or a related field.
- 6 years of experience with direct people management leading integration teams through major technology ramps and volume transitions.
- Experience with advanced statistical analysis and problem-solving methodologies (e.g., JMP, DOE, etc.), along with compound semiconductors (GaN on Si), microLEDs, or advanced CMOS integration.
- Experience managing technology handoffs from advanced R&D/NPI teams into production.
About the job
As a Senior Manager of Manufacturing Process Integration, you will lead our industrialization and yield-scaling efforts. You will take the reins from development teams, extending manufacturing baselines, driving rapid yield learning cycles, and partnering across operations, module process engineering, development and product quality functions to scale breakthrough consumer hardware.
Google's Raxium display group has established a revolutionary semiconductor materials display technology that enables new functionality in display products, bringing to users a closer and more natural linkage between the digital and physical realms in applications such as augmented reality (AR) and light-field display. With start-up roots and a state-of-the-art compound semiconductor fab in Silicon Valley, Raxium is seeking to build upon its engineering team with an aim to disrupt next-generation display markets.
Individual pay is determined by factors including job-related skills, experience, and relevant education or training.
US: $236000 - $329000 (USD) + 25% bonus target + equity + benefits
Learn more about
benefits at Google.
Responsibilities
- Own industrialization of Raxium's novel semiconductor-based display products, leading the transformation of early production baseline flows into robust, highly repeatable and yield-optimized processes capable of scaling to High-Volume Manufacturing (HVM) volumes. Lead collaborative expansion of operating process windows and establish high process capability indices (Cpk) across non-standard GaN-on-Si stacks.
- Extend robust process baselines, change control boards (CCB), and release gates for volume ramp.
- Institute structured PFMEA, control plans, standard operating procedures (SOPs), and DOE frameworks.
- Serve as the primary technical bridge between upstream Development teams, Unit Process Modules, Operations, and Test, and partner closely with Product Quality and Reliability functions. Ensure feedback loops deliver manufacturability insights back to next-gen pathfinding groups.
- Build, scale, and mentor a high-caliber integration team tailored for manufacturing discipline and high-paced problem-solving. Instill a culture of data-driven decision-making and operational excellence.
