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Block Level and Full chip level Static(IR)/Dynamic(IVD) sign-off
Power Estimation on blocks and full chip (both vector and vectorless)
Signal/Power EM sign-off at Block level and Full chip
Custom power grid implementation for block/hardmacs
System level Analysis (PDN) with board, package, interposer and die
Work with SoC and packaging team in bump assignment, pkg routing optimization
Dynamic analysis with vectorless/vectors/mixed mode analysis
PG Grid resistance checks
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
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Job details are sourced from the employer's original posting.
Open job postingAbout the company
A company involved in research and development, likely within the technology or semiconductor sector.