Design Verification Engineer

Job Title : Design Verification Engineer

Job Type : Full time

Location : San Diego And Bay Area

Job Description :
Strong verification skills: test planning, problem solving, debug, adversarial testing. Multimedia Camera Image processing, Video or graphics hardware experience is preferred.
Strong working knowledge of HVLs: System Verilog, VERA/e-Specman, System C.
Experience with methodologies like RVM/VMM/OVM/UVM. RTL design experience and/or very strong OOPs programming experience is also a plus.
Good written and oral communications skills required.
Experience with simulation acceleration tool like Veloce/Palladium is a plus.
Skill required:
CPU, (MC: middle core, ARM architecture)
Decent knowledge of assertions.
SV and decent UVM knowledge
Code coverage.
Verilog or VHDL, C/C++, Tcl/Perl/shell-scripting.

All your information will be kept confidential according to EEO guidelines.