Wafer Fab Integration Engineering Technician (Weekend Day Shift)

• Will NSA/CAPS approval be required? (E.g., accessing a US Customer Network?): No
• Role Type: Individual contributor
• Laptop - support with ordering needed: Yes
• Salary Range: $35-$45
• Experience level: Experienced

Job Summary

Nokia’s Photonic Integrated Circuit (PIC) wafer fabs in Sunnyvale and San Jose focus on the production and R&D of advanced Indium Phosphide (InP) semiconductor devices. As a Wafer Fab Integration Engineering Technician, you will play a critical role in supporting wafer fabrication processes, improving product quality, and reducing defects.

This position offers the opportunity to work closely with cross-functional engineering teams to troubleshoot complex process issues, enhance yield and reliability, and contribute to the ramp-up of a high-volume manufacturing facility in San Jose. You will be part of a collaborative environment that emphasizes teamwork, continuous learning, and cutting-edge semiconductor innovation.

Responsibilities

Key Responsibilities

· Investigate root causes for production lots placed on hold and drive corrective actions

· Troubleshoot performance issues and yield excursions within the wafer fabrication process

· Support engineering tool qualifications and process validations

· Assist engineers with failure analysis, including:

o Visual inspections

o CD-SEM measurements

o Electrical IV testing

o Profilometry depth measurements

· Utilize Manufacturing Execution Systems (MES) to:

o Collect and track data

o Perform basic data analysis

o Generate reports (e.g., PowerPoint presentations)

· Monitor Statistical Process Control (SPC) charts and provide first-level response to out-of-control conditions

· Coordinate and track qualification and development lots across fabrication, assembly, and test operations

· Ensure compliance with PIC product quality systems and standards

· Support next-generation PIC platform development, including technology transfer and production ramp

· Collaborate with cross-functional teams to improve process integration, yield, and device performance

Work Schedule: Weekend day shift — Friday, Saturday, Sunday, and every other Thursday from 6:00 AM to 6:00 PM

Qualifications

Minimum Qualifications & Requirements

· Bachelor’s degree in Science, Engineering, or a related technical field

· Minimum of 3 years of experience in a modern semiconductor fabrication environment (5+ years preferred)

· Strong attention to detail with a high commitment to quality

· Demonstrated problem-solving skills and ability to follow through on tasks

· Self-motivated, with a willingness to learn and expand technical skills

· Strong sense of ownership and accountability

· Effective team player with strong verbal and written communication skills

· Ability to manage multiple tasks, prioritize work, and meet deadlines

· Proficiency in using computer systems and software tools for data analysis and reporting

Preferred Qualifications:

· Experience with Indium Phosphide (InP) or Gallium Arsenide (GaAs) semiconductor processes

· Familiarity with wafer fab processes such as photolithography, etch, deposition, and CVD