SRAM Design Engineer

Position Summary

About Samsung Semiconductor India Research (SSIR)
With a wide range of industry-leading semiconductor solutions, we are enabling innovative growth in market segments in component solutions, featuring industry-leading technologies in System LSI, Memory and Foundry. Our engineers are offered a foundation to work on cutting-edge technologies such as Foundation IP Design, Mobile SoCs, Storage Solutions, AI/ML, 5G/ 6G solutions, Neural processors, Serial Interfaces, Multimedia IPs and much more.
As one of the largest R&D centers outside Korea for Samsung Electronics, we take pride in our ability to work on some of the cutting edge technologies. Our engineers get to work across diverse domains, projects, products, clients, people and countries, and conduct research in new and emerging technology areas. Innovation and creativity are highly valued at this innovation hub, as we strive towards providing high reliability; high performance and value added services that enable Samsung Electronics deliver world-class products.

Role and Responsibilities

Position: SRAM Design Engineer

Roles and Responsibilities

•          Design highly competitive circuits to meet performance/power specifications requested by customers.

•          Guide and lead a group of engineers to deliver the SRAM IP in the given timelines.

•          Analyse circuits and identify potential robustness gaps and find solutions to improve robustness of the design.

•          Own the responsibility from SPEC to GDS and DK delivery.

•          Review circuits, robustness reports and identify potential robustness issues.

•          Review Layouts and suggest improvement areas to achieve competitive PPA.

•          Understanding of SRAM PPA trade-offs and identify right techniques to meet SPEC.

•          Must be able to communicate effectively across different teams.

Skills and Qualifications

Skills & Experience:

•          Master/Bachelor in electronics.

•          Working experience in preferably Memory design.

•          Understanding of RC network and FINFET fundamentals are necessary.

•          Custom or Compiler SRAM/ROM development experience.

•          Fundamentals of process variability and its effect on memory design.

•          Thorough understanding of SRAM bit cell and its characteristics (Read current, Standby current, data retention, SNM).

•          Strong understanding of circuit design fundamentals.

•          Critical path modelling concept, various type of models ( RC, C, Pai, ladder).

•          Good knowledge of semiconductor physics. Like knowledge of FINFET function, parasitic etc.

•          Analysing layout and understanding of LLE effects.

Experience – 4 to 14 Years of experience

Qualifications

• B.Tech/B.E/M.Tech/M.E

Disclaimer

Samsung Semiconductor India Research (SSIR), a division of Samsung R&D India - Bangalore Pvt. Ltd is dedicated to employing a diverse workforce and providing Equal Employment Opportunity to all individuals, regardless of their religion, gender, age, marital status, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.

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