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    Synopsys

    Semiconductor Design

    ASIC Digital Design, Manager - 13992

    Noida, IndiaOn-SiteFull-time12–15 yrs experiencePosted 5h ago
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    Job description

    General Information

    Job Title
    ASIC Digital Design, Manager
    Job ID
    13992
    Country
    India
    City
    Noida
    Date Posted
    13-Jan-2026
    Job Category
    Engineering
    Job Subcategory
    ASIC Digital Design
    Hire Type
    Employee
    Remote Eligible
    No

    Descriptions & Requirements

    Job Description and Requirements

    Synopsys is at the heart of all the advanced silicon design, we supply the essential tools and intellectual properties to enable semiconductor design, verification, and production. We’re powering all state-of-the-art design market with the world’s most advanced technologies for chip design and software security.

    LPDDR PHY IP is a staple of the mixed-signal IP market, and Synopsys is the leading provider of LPDDR PHY IP products.  All current and next-generation technologies are being developed by the LPDDR PHY IP team, both digital and analog components, complement each other in creating a high-performance, high-bandwidth, low-latency and low-power products.

    We are looking for an ASIC Digital Design Sr. Manager to join Synopsys LPDDR PHY IP team to lead innovation and development of the world-class market-leading DesignWare LPDDR PHY IP solution. 

    Job Description

    • Be part of a global diverse team that pushes boundaries on DDR PHY IP development and solution
    • Your passion and expertise will shape the next generation of product innovation, performance, and efficiency
    • You will manage a team of design engineers and work with Architect, Verification, Physical implementation, and Firmware teams
    • In this role, you will contribute to all phases of designs of DDR PHY IP from design specification to productization, including certain level of customer support into their SoCs
    • You will lead the team to deliver the design and achieve the best timing, performance, and power goals

    Required Skills

    • BS in Electrical Engineering with at least 12-15 years of experience in complex technical development
    • 2 years of experience in people management, developing employees
    • Experience with synthesizable Verilog and System Verilog design concepts and implementation
    • Experience with front-end design flows including linting, synthesis, STA, cross-domain clocking, DFT, and power optimization techniques
    • Exhibit excellent communication skills and be self-motivated
    • Understanding of memory and memory PHY architecture is a plus 

    At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

    Job details are sourced from the employer's original posting.

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    About the company

    Synopsys

    Synopsys is a world leader in electronic design automation (EDA) and semiconductor IP.

    View all Synopsys jobs
    Industry
    Semiconductor Design
    Open roles
    285

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