Job Duties:
· Must be able to design sensitive analog circuitry, including but not limited to: OP-AMPs, OTAs, A/D and D/A converters, High-speed I/O design, including the design of a 16G SERDES.
· Must be familiar with the HSpice simulator and the Cadence design environment.
· Verify circuit robustness using Monte Carlo simulation.
· Knowledge of the Verilog design language is a plus.
· Familiarity with the Unix/Linux environments required.
· A knowledge of Perl and/or Python + Matlab is also a plus.
Experience and Education:
· 7-10 years of relevant work experience
· Experience in custom circuit design, and Transistor level design
· Experience with physical design, directing layout engineers, performing electrical analysis checks (EM, noise), and fixing errors from said checks
· Experience with SPICE simulations
· Schematic and layout experience
· Experience with Cadence, preferred
· General knowledge of scripting and debugging
· Languages: Verilog, C++/C, Perl, and Python, preferred
· Processor custom circuit design, preferred
· Experience with low power design, preferred
· Problem solving skills, attention to detail, able to work individually and within a team.
Regards,
Vikranth
Sr. IT Recruiter
US Tech Solutions, Inc.
10 Exchange Placet#1820
Jersey City, NJ-07302
Desk: 201-524-9600 – Ext: 7901
Job details are sourced from the employer's original posting.
Open job postingAbout the company
USTECH is a global firm providing a wide-range of talent on-demand and total workforce solutions. Through the USTECH Talent Network of 100% company-owned and managed offices, we provide highly-skilled professionals whose education, skills and experience are vetted and matched to your unique hiring needs, work environment and company requirements. Our 24x7 global service delivery drives time and cost out of any recruiting and staffing process (15-30% cost reduction in most cases) across all of our services and solutions, providing you with the talent you need on-demand when, where and how you need it.